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Swapping Out Chiplets: I/Os Vs. Compute
Key Takeaways: Companies can save time and money by swapping out a compute, memory, or I/O chiplet to gain technology improvements, while keeping the other dies stable. Chip architects may choose to...
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AI Starting To Simplify Design Of Programmable Logic
Key Takeaways AI/ML and agentic tools are getting better at helping design and compile FPGAs, but downstream programming is slower to benefit. FPGAs historically have been designed using Verilog or...
View ArticleAnnual Global IC Fabs And Facilities Report
Semiconductor companies announced a significant number of facilities in 2025 as global onshoring efforts continued across manufacturing, materials, packaging, design, and R&D. Investments came from...
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Programmable Chips Evolve For Shifting Needs
ICs and SoCs are utilizing a range of processing elements that allow them to optimize current workloads while hedging their bets for the future. What used to be a simple choice between an ASIC, FPGA,...
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FPGAs Find New Workloads In The High-Speed AI Era
FPGAs are finding new applications in the age of artificial intelligence, high-speed wireless communications, medical and life science technology, and in complex chip architectures where they can...
View ArticleChip Industry Week In Review
China’s Hefei Lumiverse Technology reportedly has developed a desktop-sized High Harmonic Generation light source that generates wavelengths as small as 1nm. One customer already has used it to produce...
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Chip Industry Week in Review
SK hynix is ramping HBM manufacturing capacity to meet explosive demand for AI data centers. The company will launch 16-stack HBM4 next year, and up to 12-stack HBM4E. HBM5 and HBM5E will be introduced...
View ArticleChip Industry Technical Paper Roundup: Oct. 7
New technical papers recently added to Semiconductor Engineering’s library: Technical Paper Research Organizations Double Duty: FPGA Architecture to Enable Concurrent LUT and Adder Chain Usage Nanyang...
View ArticleDouble Duty Logic Block Architecture Enabling Concurrent LUT and Adder Chain...
A new technical paper titled “Double Duty: FPGA Architecture to Enable Concurrent LUT and Adder Chain Usage” was published by researchers at Nanyang Technological University, Cornell University,...
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Chip Industry Week in Review
Amkor, TSMC, and Cadence partnered with Tesoro VC, which will serve as the lead operator of a new Global AI + Semiconductor Startup Hub and a Global Design Center in Phoenix, Arizona, aimed at chip...
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Complex Mix Of Processors At The Edge
With AI changing so fast, it’s a juggle for companies to ensure they can deliver the best performance now while also future-proofing for unknown AI models or a completely different approach to training...
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For Chip Developers, HW/SW Co-Design Key To Data Center Efficiency
Data centers and high-performance computing (HPC) are the primary enablers of today’s power-hungry AI-driven technology, but chip designers, EDA vendors, and the data centers themselves have a long...
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Chip Industry Week In Review
[Podcast version is here.] TSMC said it will produce 30% of its leading-edge chips in Arizona when all six of its fabs are operational, a total investment of $165 billion, Axios reported. In its latest...
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Chip Industry Week In Review
The EU Commission approved €920 million in German State aid to support Infineon in setting up its Smart Power Fab in Dresden. Total funding for the Dresden site amounts to about €1 billion. PDF...
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Chip Industry Week In Review
Synopsys agreed to sell its Optical Solutions Group to Keysight for an undisclosed amount, in a deal deemed necessary for Synopsys to win regulatory approval for its planned acquisition of Ansys. The...
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Chip Industry Week In Review
By Adam Kovac, Karen Heyman, and Liz Allan. India approved the construction of two fabs and a packaging house, for a total investment of about $15.2 billion, according to multiple sources. One fab will...
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ML Focus Shifting Toward Software
New machine-learning (ML) architectures continue to garner a huge amount of attention as the race continues to provide the most effective acceleration architectures for the cloud and the edge, but...
View ArticleAMD Wants An FPGA Company, Too
AMD signed a definitive agreement to acquire Xilinx for $35 billion in stock, setting the stage for a head-to-head battle against Intel in nearly all major markets. But there’s more to this acquisition...
View ArticleWeek in Review: IoT, Security, Autos
Products/Services Rambus reports completing its acquisition of Northwest Logic, a supplier of memory, PCIe, and MIPI digital controllers. Meanwhile, the company named Sean Fan as chief operating...
View ArticleSecurity, Scaling and Power
If anyone has doubts about the slowdown and increasing irrelevance of Moore’s Law, Intel’s official unveiling of its advanced packaging strategy should leave little doubt. Inertia has ended and the...
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